1. Field of the Invention
The present invention relates to an interface apparatus for mediating the sending and receiving of signals between devices mutually connected by a signal line having at least one pair of signal transmission lines.
2. Description of the Related Art
In personal computers (PC) of recent years, the Universal Serial Bus (USB) has gained attention as a common interface standard for connecting peripheral devices, such as keyboards, mice, speakers, modems, printers, and scanners, to a PC that acts as a host (host PC).
With the USB, it is possible to connect individual peripheral devices in a treelike manner from the host PC. By disposing, for example, a hub for the peripheral devices, it is possible to connect many peripheral devices downstream from the peripheral devices. The operation of all of the connected peripheral devices is managed by the host PC, and various kinds of data are transferred between the individual peripheral devices and the host PC. In this data transfer, it is not possible for the individual peripheral devices to request data transfer from the host PC. Data exchange is always conducted in accordance with a call from the host PC. It is possible for data to be transferred at a rate of 12 Mbps in the full-speed mode (FS mode) and 1.5 Mbps in the low-speed mode (LS mode). Transfer rates are set in individual peripheral devices in accordance with the purposes of the peripheral devices.
USB cables, which connect the upstream host PC and hub for the peripheral devices (collectively referred to below as “upstream devices”) and individual downstream peripheral devices (collectively referred to below as “downstream devices”), comprise four lines: one pair of signal lines (D+ line and D− line) and one pair of power lines (Vcc line and GND line). At the point in time at which the upstream devices are connected to the downstream devices with a USB cable, it becomes possible for power to be supplied from the upstream devices to the downstream devices via the power lines.
A ground pull-down resistor of predetermined resistance (e.g., 15 kΩ) is connected to each of the D+ line and the D− line at a USB cable connection interface (USB I/F) disposed at the upstream devices. At the USB I/F disposed at the downstream devices, a pull-up resistor of predetermined resistance (e.g., 1.5 kΩ) to the power voltage VDD (3.0 V to 3.6 V) is connected to the D+ line in the case of FS-mode peripheral devices and connected to the D− line in the case of LS-mode peripheral devices. Thus, when the USB cable is not connected at the USB I/F of the upstream devices, the D+ line element and the D− line element are held at a low potential (L level). At the point in time at which the upstream devices and the downstream devices are connected by the USB cable, the signal line (e.g., the D+ line in the case of FS-mode peripheral devices) pulled up at the power voltage VDD at the USB I/F of the downstream devices is held at a high potential (H level) by the power voltage VDD and the other signal line (e.g., the D− line in the case of FS-mode peripheral devices) is held at the L level.
According to the above structure, by detecting the voltage levels of the D+ line element and the D− line element of the USB I/F, it is possible to for the upstream devices including the host PC to identify whether there is a connection with the downstream devices and to identify the transfer rates which the downstream devices support. It should be noted that, when a connection with the downstream devices is identified, the host PC carries out a call for initiating data transfer with respect to the downstream devices.
However, when the downstream devices are devices for which it is necessary to conduct predetermined initialization processing immediately after power has been supplied thereto (e.g., in the case of a printer, when it is necessary to conduct a memory check and warm up printer engine parts immediately after power has been supplied to the printer), there are cases in which, even if a connection with the downstream devices is identified at the host PC and a call for initiating data transfer is made, the downstream devices cannot respond to the call from the host PC until the initialization processing is concluded. When there is no response from the downstream devices, sometimes the host PC determines that there is no connection even if there is a connection with the downstream devices, and the host PC cuts the downstream devices away from the system.
In order to eliminate this problem, technology has conventionally been proposed in which the connected downstream devices are set in a pseudo-non-connected state during the period of time until the downstream devices are able to respond to the call from the host PC (e.g., the period of time until the initialization processing is concluded).
For example, technology (referred to below as Prior Art 1) has been proposed (e.g., see Japanese Patent Application Laid-open Publication No. 11-245487) as shown in FIG. 6A wherein, in a FS-mode downstream device disposed with a USB I/F 40, a pull-down resistor RA and a switching element 42, which is grounded, are serially connected to the D+ line that is pulled up (not illustrated), and the D+ line is held at the L level by turning on the switching element 42 during the period of time until the downstream device is able to respond to the call from the host PC.
Other technology (referred to below as Prior Art 2) has been proposed (e.g., see Japanese Patent Application Laid-open Publication No. 2000-293479) as shown in FIG. 6B wherein, in a FS-mode downstream device disposed with a USB I/F 40, a switching element 44 is serially connected to a D+ line that is pulled up by a pull-up resistor RB at a power voltage VDD, and the D+ line element is held at the L level by turning the switching element 44 off during the idling period.
Further still, technology (referred to below as Prior Art 3) has been proposed (e.g., see Japanese Patent Application Laid-open Publication No. 11-194993) as shown in FIG. 6C wherein switching elements 46 and 48 are respectively disposed on the D+ and D− lines connecting upstream devices and downstream devices, and individual devices connected to both lines are appropriately identified by turning on/off the switching elements 46 and 48 and connecting/disconnecting the D+ and D− lines themselves.
By applying the aforementioned prior arts, it is possible to appropriately detect a connection in the USB connection between the host PC and peripheral devices and to normally conduct data transmission.
Recently, in response to a demand to accelerate data communication speed accompanying an increase in the mass of data handled by PCs, such as image data, the USB 2.0 specification, which allows for a high-speed mode (HS mode) at 48 Mbps in addition to the LS and FS modes, has been devised and officially released as a higher standard of the USB (USB 1.1, etc.). The USB 2.0 specification basically follows in the footsteps of conventional USB specifications (USB 1.1, etc.).
With the USB 2.0, a pull-up resistor (1.5 kΩ) to the power voltage VDD is connected to the D+ line as in the case of the FS mode, and in the HS mode output impedance in each of the D+ and D− lines is set to a predetermined value (e.g., 45 Ω). When the upstream devices and the downstream devices are connected, the differential voltage of the D+ line and the D− line is approximately 400 mV. When the upstream devices and the downstream devices are not connected, the differential voltage of the D+ line and the D− line is approximately 800 mV.
In the HS mode, the USB I/F is driven in a J mode (in which the D+ line element is at the H level and the D− line element is at the L level) or in a K mode (in which the D+ line element is at the L level and the D− line element is at the H level) at the upstream devices in order to detect connection with the downstream devices. When the differential voltage of the D+ line element and the D− line element is 625 mV or greater in this case, it is identified that the downstream devices are not connected to the upstream devices.
However, it is difficult to apply the above Prior Arts 1 and 2 and set the downstream devices in a pseudo-non-connected state during the period of time until the downstream devices are able to respond to the call from the host PC, in order to conduct data communication between the host PC and the peripheral devices normally with respect to devices conforming to the USB 2.0 standard, in which connection between the devices is detected as described above.
Moreover, with devices conforming to the USB 2.0 standard corresponding to the rapid data transfer rate HS mode, there is the potential for trouble to occur in data communication when the above Prior Art 2 is applied and a switching element is disposed directly on the signal lines.